Weiwen Jiang

Department of Computer Science and Engineering
University of Notre Dame (PI: )
Email:


Ph.D. Advisors: and
Weiwen will join the ECE Department at George Mason University in Fall 2021.

Short Bio:
Dr. Weiwen Jiang is currently a Post-Doctoral Research Associate at the University of Notre Dame. He received the Ph.D. degree from Chongqing University in 2019. From 2017 to 2019, he was a research scholar in the Department of Electrical and Computer Engineering at the University of Pittsburgh. His research works have won two Best Paper Awards in NVMSA’15 and ICCD’17, and four Best Paper Nominations in ASP-DAC’16, DAC’19, CODES+ISSS’19, ASP-DAC’20, and Top Winning Awards at IEEE Services Hackathon. In his first postdoc year, he received research funds from NSF IIS and NSF I/UCRC. Furthermore, he built the first co-design framework, QuantumFlow, to demonstrate the quantum advantage in designing neural network onto a quantum computer, which is published in Nature Communications [Details]
Research Interests:
|---HW/SW Co-Design
     |---HW: Edge Computing, Quantum Computing
     |---SW: Neural Networks, Streaming Applications
News:
2021/04    This website will no longer be updated. Please visit JQub website for updates!.
2021/03    Weiwen will join the ECE department at George Mason University as an Assistant Professor in Fall 2021.
2021/02    Our paper on AutoML for the on-line reconfigurable transformer is accepted by DAC 2021.
2021/01    The SS work serving as the backbone of QuantumFlow has been released at Github
2020/12    Top Winning Awards at IEEE Services Hackathon. Media Coverage：[ND Media]
2020/12    QuantumFlow work has been accepted by Nature Communications
2020/11    A special session work on implementing neural networks onto quantum circuits using IBM Qiskit will be given at ASP-DAC'21
2020/10    Invited to serve as a TPC member in DAC 2021.
2020/10    Invited to serve as a TPC member in SRC at ASP-DAC 2021.
2020/10    Invited to serve as a TPC member in SAC 2021.
2020/10    Invited to serve as a TPC member in ASP-DAC 2021.
2020/10    Our paper is accepted by ICCD 2020.
2020/10    Our paper is accepted by ICCAD 2020.
2020/09    Updated QuantumFlow has demonstrated Quantum Advantages for Neural Network Computation. Media Coverage：[AI era news]
2020/08    Proposal on FPGA-based COVID-19 Screening is funded by NSF IIS. Media Coverage：[The OBSERVER news]
2020/07    Our paper with the collaboration of Edgecortix is accepted by CODES+ISSS (ESWEEK 2020). [Paper]
2020/07    Invited presentation at ROAD4NN workshop in DAC'20. [Slides]
2020/06    The first machine learning and quantum circuit co-design framework, QuantumFlow, is on-line now. Media Coverage：[AI era news]
2020/06    Two papers on NAS for Medical Image Segmentation and NAS for secure Medical are accepted by MICCAI.
2020/04    Received research grant from Facebook for the collaboration of on-deivce AI.
2020/04    Our paper on co-exploration of NAS and CIM is accepted by IEEE TC.
2020/03    Our paper with the collaboration of Edgecortix is accepted by IEEE TCAD.
2020/02    Our paper with the collaboration of Facebook and Georgia Tech is accepted by DAC 2020.
2020/01    Dr. Jiang is invited to be the TPC member in Late Result Break in DAC'20
2020/01    One paper is accepted by ECAI 2020.
2020/01    Our ASP-DAC 2020 paper is Nominated as Best Paper Candidate. [Details]
2020/01    Dr. Jiang is invited to be the TPC member in ISLVLSI'20
2020/01    Dr. Jiang is invited to be the TPC member in GLSVLSI'20
2019/10    Received research grant from Edgecortix for the collaboration in HW/SW Co-Exploration for Machine Learning on Edge.
2019/09    Received travel grant from IEEE/CEDA.
2019/08    Our paper on Co-Exploring Neural Architecture and Network-on-Chip Designs is accepted by ASP-DAC 2020.
2019/08    Our CODES+ISSS2019 paper is Nominated as Best Paper Candidate (Presentation Scheduled on Oct. 14). [Details]
2019/08    Talk our recent works in Technical Webinar of NSF IUCRC for ASIC - August, 2019 (Presentation).
2019/07    One tutorial paper is accepted by ICCAD 2019.
2019/07    One paper is accepted by ISVLSI 2019.
2019/07    Otain Ph.D. degree and will join University of Notre Dame as a post-doctoral scholar.
2019/06    One paper on Achiveing Super-Linear Performance accross Multi-FPGA is accepted by CODES+ISSS (ESWEEK 2019) [arXiv].
2019/05    Our DAC2019 paper is Nominated as Best Paper Candidate (Presentation Scheduled on Jun. 4) (Rate 5/815=0.61%). [Details]
2019/01    Our paper on Hardware-Aware Neural Architecture Search is accepted by DAC 2019 (Rate 202/815=24.8%) [arXiv].
2018/12    The pubilicly code repository is built, please visit PITT-JZ-COOP
2018/11    One paper is accepted as a poster in FPGA 2019
2018/07    One paper is accepted by CASES, which is one conference in ESWEEK. The paper will appear at IEEE TCAD
2018/05    One paper is accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).
2018/05    One paper is accepted by IEEE Transactions on Computers (TC).
2018/04    Awarded Scholarship from ACM SIGDA to attend PhD Forum at DAC 2018.
2018/02    One paper is accepted in GLSVLSI 2018 as poster paper to be appeared in the conference.
2018/01    One paper is accepted by IEEE Transactions on Emerging Topics in Computing (IEEE TETC)
2017/12    One paper is accepted in DATE 2018 as poster paper to be appeared in the conference.
2017/11    Awarded the BEST PAPER in ICCD2017@Boston. (Rate 5/258=1.9%). [Details]
2017/11    Awarded the BEST STUDENT PAPER in ESTC2017@Shenyang. [Details]
2017/10    One paper is accepted by ESTC 2017 (Chinese).
2017/10    Awarded grants from ACM SIGDA and Microsoft to Participate in Student Research Competition at ICCAD 2017 (SRC@ICCAD). [Details]
2017/09    One paper is accepted by IEEE Transactions on Computers (IEEE TC).
2017/09    Awarded one of the top ranked submission (selected for IEEE TETC Special Issue. Rate 12/258=4.65%). [Details]
2017/09    One paper is accepted in ICCD 2017.
2017/05    Awarded Scholorship from China Scholorship Council (CSC) to visit Univeristy of Pittsburgh.
2017/04    One paper is accepted by Computers & Industrial Engineering (CAIE).